Conventional integrated circuits are becoming increasingly complex. Today, an integrated circuit may be formed having multiple layers of conductive material or interconnect layers. The use of multiple layers of conductive materials or interconnect layers results in an integrated circuit which has an extremely nonplanar topography. Non-planar surfaces in integrated circuits are known to cause difficulties such as voids in dielectric materials, photolithography resolution problems due to depth of focus, etch damage due to varying film thicknesses and film heights, and reduced yield.
To avoid these difficulties, planarization of integrated circuit layers is now becoming essential to ensure a high performance, high yield integrated circuit. One method for planarizing a surface involves first forming a layer of material which requires planarization. A planar layer of photoresist material is spun overlying the layer of material. An etch chemistry is selected which etches the layer of material and the planar layer of photoresist at approximately the same rate. This etch chemistry is used to etch the planar surface of the photoresist layer into the layer of material thereby planarizing the layer of material.
The etch chemistry used to etch the layer of material and the planar layer of photoresist at approximately the same rate is difficult to control and monitor. In most cases, process variation, film thickness variation, differences in film composition, contamination, and other phenomena result in the etch rates not being equal. If the etch rates are not equal, the surface is not as planar as desired. In addition, there is no way in which to consistently endpoint this method of planarization.
In most cases, a timed etch/planarization process is utilized for the above described process due to the fact that the above described process is not able to accurately endpoint. A timed etch/planarization process planarizes the layer of material and the planar layer of photoresist for a predetermined amount of time. Timed etches/planarizations are subject to under-etching and over-etching. If the layer of material is over-etched, then conductive layers which are underlying the layer of material could be exposed through the layer of material resulting in undesirable electrical short circuits. If the layer of material is under-etched, then the layer of material may remain unplanarized, or may remain too thick. Subsequent electrical contact etch processing may not completely remove portions of the layer of material resulting in electrical contacts being formed as undesirable electrical open circuits.
Another method which is used to planarize is known as chemical mechanical polishing (CMP). CMP involves forming a layer of material over a substrate. A planar pad, rotating from roughly ten to thousands of rotations/360.degree. revolutions per minute (RPM), is applied to the wafer. The wafer exerts a force on the layer of material and grinds the layer of material to a planar or near-planar surface. In some cases a chemical/liquid polishing compound, known in the art as a slurry, is placed between the planar pad and the layer of material to aid in the planarization. In most cases the slurry contains suspended solid particles which are used for furthering the polishing process.
CMP, much like chemical etch planarization, is difficult to endpoint. Therefore in most cases, CMP is time-based like a timed etch. Therefore, CMP, as currently practiced in the art, is subject to all of the disadvantages recited above in regard to timed etching.
In some cases, an etch stop layer is covered over the entire layer of material to help in endpointing the CMP process. The etch stop material is a material which planarizes much slower than the layer of material. Therefore, once the etch stop material is in contact with the planar pad used for polishing, polishing is slowed significantly and end-pointing may take place with reduced over-etching and under-etching.
By using an etch stop layer which covers the entire layer of material, the etch stop layer needs to be etched in order to form through-holes, contacts, vias or the like. The etching of many known etch stop layers, such as Al.sub.2 O.sub.3 and boron nitride, requires complex and difficult processing or multi-step etch processing, and may result in profile damage to contacts. In addition, the etch stop layer becomes a part of the layer of material and alters a thickness of the layer of material and the dielectric constant of the layer of material. Furthermore, if the etch stop layer is conductive, special processing is required in order to avoid the electrical short circuiting of contacts and the like.